1. Field of the Invention
The present invention concerns a method of manufacturing a semiconductor device, and a semiconductor device and it particularly relates to a semiconductor device having a capacitor element.
2. Description of Related Art
Japanese Patent Application Laid Open Publication No. 2003-007854 (Patent document 1) and Japanese Patent Application Laid Open publication No. 2004-274051 (Patent document 2) disclose semiconductor devices having a cylinder type MIM (Metal Insulator Metal) capacitor. In the cylinder type MIM capacitor, a lower electrode is formed so as to cover the entire portion of a concave inner wall of an interlayer dielectric film.
Further, Japanese Patent Application Laid Open publication No. 2001-210798 (Patent document 3) and Japanese Patent Application Laid Open Publication No. 2004-327627 (Patent document 4) describe planar type MIM capacitors.
Patent document 3 discloses to form a planar type MIM capacitor by the following procedures. That is, a conductive film is formed so as to cover a contact plug formed of W, which is patterned to form a lower electrode of a capacitor over a W plug. In this case, the lower electrode is formed also over the contact plug for connecting a high concentration impurity diffusion layer and an interconnection thereover. Then, an insulation film including a dielectric material is formed so as to cover the lower electrode over the interlayer insulation film, which is patterned to form a dielectric capacitance insulation film over the lower electrode. Then, the dielectric material is sintered by oxygen annealing to conduct crystallization. Then, an upper electrode is formed by forming and patterning a conductive film as the upper electrode. Then, the contact plug for connecting the high concentration impurity diffusion layer and the interconnection thereover is removed by using lithography and dry etching. Then, an insulation film is stacked over the interlayer insulation film. The document 3 describes that during the steps described above, oxidation of the W plug in the contact plug having the capacitor elements formed thereover and the contact plug for connecting the high impurity concentration diffusion layer and the interconnection thereover can be prevented by an oxygen barrier layer contained in the lower electrode.